Presently, many modern applications require electronic equipment. Therefore, consumers are increasingly demanding more processing power, lower electrical power usage and cheaper devices. As the electronic industry strives to meet these demands and more complicated and denser configurations, miniaturization will result in an extension of the number of chips per wafer and the number of transistors per chip, as well as a reduction in power usage. A wafer level packaging (WLP) technology has been gaining in popularity and is widely applied, due to electronic components being designed to be lighter, smaller, more multifunctional, more powerful, more reliable and less expensive. This technology provides a wafer level manufacturing of semiconductor devices with high functions and complicated structures while the size of the semiconductor devices is minimized.
During the operations of the wafer level manufacturing of a semiconductor device, the semiconductor device is sawed or singulated by a mechanical or laser blade. The singulation operations involve many complicated manufacturing processes that cause the semiconductor device to be easily damaged during the singulation operations. Since damages such as poor reliability of the molding, cracking and delamination are poorly controlled, improvements for a singulation-related technology continue to be sought.